Abstract

Smart devices for structural health monitoring provide edge computing capabilities to reduce wireless transmission and, thus, power consumption. Although effective algorithms have been proposed in the last few decades, traditional microcontrollers require heavy data flow between the memory and the central processing unit that involves a considerable fraction of the total energy consumption. Phase change memory has recently emerged as an attractive solution in the field of resistive nonvolatile memory for analog in-memory computing, which is a valid approach to avoid data being conveyed among distinct elaboration units. However, it has never been envisaged in structural health monitoring applications. As this technology is still in an embryonic state, several challenges related to nonlinearities and nonidealities of the memory elements and the energy expenditure related to the memory reprogramming process may undermine its usage. In this paper, the application of a novel identification approach for civil infrastructures is investigated using phase change memories. The main computational core of the presented algorithm, consisting of one-dimensional convolutions, is particularly suitable for implementations involving analog in-memory computing, thus showing the great potential of this technology for structural health monitoring applications. The test unit is an embedded phase change memory provided by STMicroelectronics and designed in 90-nm smart power bipolar complementary metal-oxide-semiconductor (CMOS)-double-diffused metal-oxide-semiconductor (DMOS) technology with a Ge-rich Ge-Sb-Te alloy for automotive applications. Experimental results obtained for a viaduct of an Italian motorway support the efficacy of the method. Moreover, the influence of nonidealities on the outcomes of damage identification based on both dynamic and quasi-static structural parameters is examined.

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Data Availability Statement

Vibration data of the case study was provided by a third party. Direct requests for this material may be made to the provider as indicated in the “Acknowledgments” section. The code generated during the study is available from the corresponding author by request.

Acknowledgments

The authors kindly acknowledge the research group of Prof. Rocco Alaggio and, in particular, Dr. Angelo Aloisio (University of L’Aquila, Italy) for having shared the experimental data of the viaduct. This work was supported in part by the Italian Ministry for Education, University and Research (MIUR) under the program “Dipartimenti di Eccellenza (2018–2022).”

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Journal of Computing in Civil Engineering
Volume 36Issue 4July 2022

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Received: Nov 11, 2021
Accepted: Feb 9, 2022
Published online: Apr 12, 2022
Published in print: Jul 1, 2022
Discussion open until: Sep 12, 2022

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Ph.D. Student, Dept. of Civil, Chemical, Environmental, and Materials Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy (corresponding author). ORCID: https://orcid.org/0000-0001-6388-370X. Email: [email protected]
Ph.D. Student, Dept. of Electrical, Electronic, and Information Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy; Research Fellow, Advanced Research Center on Electronic Systems, Univ. of Bologna, Viale Carlo Pepoli 3/2, 40125 Bologna, Italy. ORCID: https://orcid.org/0000-0003-0952-3839. Email: [email protected]
Eleonora Franchi Scarselli [email protected]
Associte Professor, Dept. of Electrical, Electronic, and Information Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy; Advanced Research Center on Electronic Systems, Univ. of Bologna, Viale Carlo Pepoli 3/2, 40125 Bologna, Italy. Email: [email protected]
Associte Professor, Dept. of Electrical, Electronic, and Information Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy; Advanced Research Center on Electronic Systems, Univ. of Bologna, Viale Carlo Pepoli 3/2, 40125 Bologna, Italy. ORCID: https://orcid.org/0000-0002-2186-3468. Email: [email protected]
Andrea Lico [email protected]
Research Fellow, Advanced Research Center on Electronic Systems, Univ. of Bologna, Viale Carlo Pepoli 3/2, 40125 Bologna, Italy. Email: [email protected]
Marcella Carissimi [email protected]
Research and Development Design Manager, STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza, Italy. Email: [email protected]
Marco Pasotti [email protected]
Research and Development Design Manager, STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza, Italy. Email: [email protected]
Roberto Canegallo [email protected]
Research and Development Design Manager, STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza, Italy. Email: [email protected]
Associate Professor, Dept. of Civil, Chemical, Environmental, and Materials Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy. Email: [email protected]
Pier Paolo Diotallevi [email protected]
Full Professor, Dept. of Civil, Chemical, Environmental, and Materials Engineering, Univ. of Bologna, Viale del Risorgimento 2, 40136 Bologna, Italy. Email: [email protected]

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